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| SI7220DN Vishay Siliconix Dual N-Channel 60-V (D-S) MOSFET PRODUCT SUMMARY VDS (V) 60 FEATURES ID (A) 4.8 4.3 rDS(on) (W) 0.060 @ VGS = 10 V 0.075 @ VGS = 4.5 V Qg (Typ) 13 D TrenchFETr Power MOSFET D New Low Thermal Resistance PowerPAKr Package, 1/3 the Space of An SO-8 While Thermally Comparable RoHS COMPLIANT APPLICATIONS D Synchronous Rectification D Primary Side Switch D1 D2 PowerPAK 1212-8 3.30 mm S1 1 2 G1 S2 3.30 mm 3 4 G2 D1 G1 G2 8 7 D1 D2 6 5 D2 Ordering Information: SI7220DN-T1--E3 (Lead (Pb)-Free) S1 N-Channel MOSFET S2 N-Channel MOSFET Bottom View ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current (TJ = 150_C)a Pulsed Drain Current Avalanche Current Single Avalanche Energy Continuous Source Current (Diode Maximum Power Dissipationa Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)b,c Conduction)a TA = 25_C TA = 70_C L = 0 1 mH 0.1 TA = 25_C TA = 70_C Symbol VDS VGS ID IDM IAS EAS IS PD TJ, Tstg 10 secs 60 "20 4.8 3.8 20 11 6.1 2.2 2.6 1.4 Steady State Unit V 3.4 2.7 A mJ 1.1 1.3 0.69 A W -55 to 150 260 _C THERMAL RESISTANCE RATINGS Parameter Maximum J Mi Junction-to-Ambienta ti t A bi t Maximum Junction-to-Case (Drain) t v 10 sec Steady State Steady State Symbol RthJA RthJC Typical 38 77 4.3 Maximum 48 94 5.4 Unit _C/W C/W Notes a. Surface Mounted on 1" x 1" FR4 Board. b. See Solder Profile (http://www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. c. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. Document Number: 73117 S-51128--Rev. B, 13-Jun-05 www.vishay.com 1 references fixed SI7220DN Vishay Siliconix SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Currenta Drain-Source On-State Resistancea Forward Transconductancea Diode Forward Voltagea VGS(th) IGSS IDSS ID(on) rDS(on) gfs VSD VDS = VGS, ID = 250 mA VDS = 0 V, VGS = "20 V VDS = 60 V, VGS = 0 V VDS = 60 V, VGS = 0 V, TJ = 85_C VDS w 5 V, VGS = 10 V VGS = 10 V, ID = 4.8 A VGS = 4.5 V, ID = 4.3 A VDS = 10 V, ID = 4.8 A IS = 2.2 A, VGS = 0 V 20 0.048 0.061 15 0.8 1.2 0.060 0.075 1 3 "100 1 5 V nA mA A W S V Symbol Test Condition Min Typ Max Unit Dynamicb Total Gate Charge Gate-Source Charge Gate-Drain Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Source-Drain Reverse Recovery Time Qg Qgs Qgd Rg td(on) tr td(off) tf trr IF = 2.2 A, di/dt = 100 A/ms VDD = 30 V, RL = 30 W ID ^ 1 A, VGEN = 10 V, Rg = 6 W f = 1 MHz VDS = 30 V, VGS = 10 V, ID = 4.8 A 13 2.3 2.6 2 10 10 20 10 30 15 15 30 15 60 ns W 20 nC Notes a. Pulse test; pulse width v 300 ms, duty cycle v 2%. b. Guaranteed by design, not subject to production testing. Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Output Characteristics 20 VGS = 10 thru 5 V 16 I D - Drain Current (A) I D - Drain Current (A) 4V 16 20 Transfer Characteristics 12 12 8 8 TC = 125_C 4 25_C -55_C 4 3V 0 0 1 2 3 4 5 VDS - Drain-to-Source Voltage (V) 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 VGS - Gate-to-Source Voltage (V) Document Number: 73117 S-51128--Rev. B, 13-Jun-05 www.vishay.com 2 SI7220DN Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) On-Resistance vs. Drain Current 0.10 r DS(on) - On-Resistance ( W ) 1000 Capacitance C - Capacitance (pF) 0.08 800 Ciss 600 0.06 VGS = 4.5 V VGS = 10 V 0.04 400 0.02 200 Crss Coss 0.00 0 4 8 12 16 20 0 0 10 20 30 40 50 60 ID - Drain Current (A) VDS - Drain-to-Source Voltage (V) Gate Charge 10 V GS - Gate-to-Source Voltage (V) VDS = 30 V ID = 4.8 A 8 rDS(on) - On-Resiistance (Normalized) 1.6 1.4 1.2 1.0 0.8 0 0 3 6 9 12 15 Qg - Total Gate Charge (nC) 0.6 -50 2.0 1.8 On-Resistance vs. Junction Temperature VGS = 10 V ID = 4.8 A 6 4 2 -25 0 25 50 75 100 125 150 TJ - Junction Temperature (_C) Source-Drain Diode Forward Voltage 20 TJ = 150_C I S - Source Current (A) 10 r DS(on) - On-Resistance ( W ) 0.12 0.10 0.08 0.06 0.04 0.02 0.00 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0 On-Resistance vs. Gate-to-Source Voltage ID = 4.8 A TJ = 25_C 1 0.0 2 4 6 8 10 VSD - Source-to-Drain Voltage (V) VGS - Gate-to-Source Voltage (V) Document Number: 73117 S-51128--Rev. B, 13-Jun-05 www.vishay.com 3 references fixed SI7220DN Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Threshold Voltage 0.6 0.4 40 0.2 V GS(th) Variance (V) -0.0 -0.2 -0.4 -0.6 10 -0.8 -1.0 -50 0 0.001 ID = 250 mA Power (W) 30 50 Single Pulse Power 20 -25 0 25 50 75 100 125 150 0.01 0.1 1 Time (sec) 10 100 600 TJ - Temperature (_C) 100 Safe Operating Area, Junction-To-Ambient *rDS(on) Limited IDM Limited 10 I D - Drain Current (A) P(t) = 0.0001 1 ID(on) Limited 0.1 P(t) = 0.001 P(t) = 0.01 P(t) = 0.1 TA = 25_C Single Pulse BVDSS Limited P(t) = 1 P(t) = 10 dc 0.01 0.1 1 10 100 VDS - Drain-to-Source Voltage (V) *VGS u minimum VGS at which rDS(on) is specified 2 1 Normalized Thermal Transient Impedance, Junction-to-Ambient Normalized Effective Transient Thermal Impedance Duty Cycle = 0.5 0.2 0.1 0.1 0.05 0.02 Notes: PDM t1 t2 1. Duty Cycle, D = 2. Per Unit Base = RthJA = 77_C/W t1 t2 Single Pulse 0.01 10-4 10-3 10-2 1 Square Wave Pulse Duration (sec) 10-1 3. TJM - TA = PDMZthJA(t) 4. Surface Mounted 10 100 600 www.vishay.com 4 Document Number: 73117 S-51128--Rev. B, 13-Jun-05 SI7220DN Vishay Siliconix TYPICAL CHARACTERISTICS (25_C UNLESS NOTED) Normalized Thermal Transient Impedance, Junction-to-Case 2 1 Duty Cycle = 0.5 0.2 0.1 0.1 0.02 Single Pulse 0.05 Normalized Effective Transient Thermal Impedance 0.01 10-4 10-3 10-2 Square Wave Pulse Duration (sec) 10-1 1 NOTE: The minimum creepage between D1 and D2 for this 100-V device is 0.2 mm. Please see PowerPAK 1212-8 outline drawing, document # 71656, for more information. Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?73117. Document Number: 73117 S-51128--Rev. B, 13-Jun-05 www.vishay.com 5 |
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